This invention relates to a system and method for generating a variable frequency sine wave carrier signal. The invention is particularly applicable as a part of a system using an in-band carrier for frequency shifting techniques for scrambling and descrambling of audio signals.
The invention comprises a system for generating the variable frequency sine wave carrier signal in response to a start signal and a rate signal, the carrier signal having frequencies lying within a predetermined spectral frequency limit, and the system including first settable counter means having a clock input for receiving a first clock signal, a count input for receiving modulus value signals for establishing the counter modulus N, and an output terminal for manifesting a binary output signal having a frequency determined by the modulus N and the first clock signal; modulus generating means having a control input for receiving the start signal, a clock input for receiving a second clock signal, and an output coupled to the count input of the first settable counter means for generating a succession of modulus values in response to receipt of a start signal and the second clock signal; and means having an input coupled to the output terminal of the first settable counter means for converting the binary output signals therefrom to analog sine signals of variable frequency.
The modulus generating means preferably includes a second counter means having an input serving the clock input of the modulus generating means and an output, and memory means for storing the modulus values, the memory means having address inputs coupled to the output of the second counter means. The memory means includes a first memory device for storing a first plurality of modulus determining values, a second memory device for storing a second plurality of modulus determining values, and processing means for receiving modulus determining values from the first and second memory devices for generating the modulus value signals for the first settable counter means.
The system further includes a second clock generating means, the second clock generating means including an oscillator and a second settable counter means having a clock input coupled to the oscillator, a count input terminal means for receiving the rate signal, and an output terminal means coupled to the clock input of the modulus generating means, the output of the second settable counter means having a frequency determined by the value of the rate signal. The rate signal may be either periodic, or non-periodic: if non-periodic, the rate signal is preferably pseudo random.
The converting means preferably includes a first low pass filter means for smoothing the binary output signals from the first settable counter means; means for generating a sine wave signal having a frequency different from the frequency of the signals output from the first low pass filter means; mixer means having a first input coupled to the output of the first low pass filter means, a second input coupled to the output of the sine wave signal generating means, and an output; and second low pass filter means having an input coupled to the output of the mixer means and an output for passing signals having frequencies lying within the predetermined spectral frequency limit.
For a fuller understanding of the nature and advantages of the invention, references should be had to the ensuing detailed description taken in conjunction with the accompanying drawings.